1. Field of the Invention
Embodiments of the present invention relate to a semiconductor memory device and a method of manufacturing the same. More particularly, embodiments of the present invention relate to a semiconductor memory device with a resistive memory material layer exhibiting improved operation.
2. Description of the Related Art
The use of non-volatile memory devices in portable digital appliances, such as digital cameras, mp3 players, personal digital assistants (PDA), and cellular phones has rapidly expanded. Flash memory devices are widely used as the non-volatile memory for such applications. A typical flash memory device cell comprises single floating gate MOS transistors, which may provide a highly integrated memory device at low cost.
However, as further reduction of manufacturing costs and higher integration of memory devices is desired, development continues on new memory devices that may overcome the limits of conventional flash memory devices. For example, memory devices have been developed having a memory cell structure using a resistive memory material.
The resistive memory material refers to a material with at least two stable resistive state. Application of an electrical pulse to the resistive memory material may generate heat, thereby setting the resistive memory material into an amorphous state or into a crystalline state with respect to its resistive state. The resistive memory material may have a high electrical resistance in an amorphous state and a low electrical resistance in a crystalline state. The resistive state may be reversibly switched, and the difference of resistances between the amorphous and crystalline states may be used to detect an operational state of the semiconductor memory device, e.g., a programming state or a deletion state.
However, an increased degree of integration of the semiconductor memory device may require a reduced gap between adjacent conductive lines, i.e., a reduced gap between adjacent intersection points of the first and second conductive lines. Such a reduced gap may trigger thermal interference, i.e., transfer of heat generated in the resistive memory material, between adjacent intersection points of the first and second conductive lines. For example, operational portions of the resistive memory material, i.e., portions at a state of programming and/or deletion, may transfer heat to adjacent non-operational portions of the resistive memory material. Such thermal interference may trigger, e.g., operation of non-operational portions of the resistive memory material by conversion thereof from an amorphous state into a crystalline state, thereby generating erroneous memory device operation.